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1、实验报告成绩:2016年5月10日姓名学号班级专业计算机科学与技术课程名称计算机组成原理课程设计任课老师章复嘉指导老师章复嘉机位号实验序号5,6,7实验名称存放器堆设计实验,MIPS汇编器与模拟器实验取,指令与译指令实验时间第6周第14周实验地点一教225实验设备号-实验程序源代码实验五modulemain(input0:0wea,input7addra,output31:0douta,inputClk,Reset,inputWrite_Reg,input14:0W_Addr,input31:0W_Data,input14:0R_Addr_A,R_Addr_B,output31:0R_Data
2、_A,R_Data_B);RAMAl(.clka(Clk),/inputclka.wea(wea/input0:0wea.addra(addra7:2),/input5:0addra.dina(R_Data_A),/input31:0dina.douta(douta)/output31:0douta);fourBl(.Clk(Clk),.Reset(Reset),.Write_Reg(Write_Reg),.W-Addr(W-Addr),.W_Data(W_Data),.R_Addr_A(R_Addr_A),.R_Addr_B(R_Addr_B),.R_Dala_A(R_Data_A),.R_
3、Data_B(R_Data_B);endmodulcmoduleRAM(inputclka,input0:0wea,input7:2addra,input31:0dina,output31:0douta);RAM_Byour_instance_name(.clka(clka),/inputclka.wea(wea),/input0:0wea.addra(addra7:2),/input5:0addra.dina(dina),/input31:0dina.douta(douta)/output31:0douta);endmodule#100;Reset=O;Clk=0;#100;W.Addr=5
4、,bll011;Clk=0;#50;Clk=1;#100;R_Addr_A=5bll011;R_Addr_B=0;Clk=0;Write_Reg=0;#100;R_Addr_A=5bll011;Write_Reg=0;Clk=0;W_Addr=O;W_Data=0;#10;Clk=O;wea=l;addra=8,b00110100;#10;Clk=1;#100;wea=0;addra=8,b00110100;#100;Clk=O;#10;Clk=1;B#100;clka=O;wea=0;addra=6,b000001;#100;clka=l;wea=0;addra=6,b000001;#100
5、;clka=O;wea=l;addra=6,b000001;#100;clka=l;wea=1;addra=6,b000001;实验6nor$l,$0,$0;#$1=FFFF_FFFFsitu$2,$031;#$2=0,000_0001add$3,$2,$2;#$3=0000.0002add$4,$3,$2;#$4=0000_0003add$5,$4,$3;#$5=0000.0005add$6,$5,$3;#$6=0000_0007sllv$74652;#$7=0000-000Eadd$9,$5,$6;#$9=0000_000Csllv$8,$6,$9;#$8=0000_7000xor$9,$
6、1,$8;#$9=FFFF_8FFFadd$10,$9,$l;#$10=FFFF_8FFEsub$114847;#$ll=0000_6FF2sub$12,$7,$8;#$12=FFFF_900Eadd$13,$9,$12;#$13=FFFF_20ODor$14,$9,$12;#$14=FFFF_9FFFor$153647;#$15=0000_000Fnor$16,$547;#$16=FFFF_FFF0add$17,$7,$3;#$17=0000_0010sllv$18,$8,$17;#$18=7000,0000sllv$19,$3,$17;#$19=0002.0000sllv$20,$19,$
7、7;#$20=8000,0000sub$2141420;#$21=7FFF_FFFFor$22,$18,$21;#$22=7FFF_FFFFadd$23,$20,$22;#$23=FFFF_FFFFsub$24,$18,$19;#$24=6FFE_0000sub$25,$19,$18;#$25=9002.0000xor$26,$L$18;#$26=8FFF_FFFFsitu$27,$22,$20;#$27=0000_0001situ$28,$26,$20;#$28=0000.0000sub$29,$22,$2;#$29=7FFF_FFFEadd$30,$20,$2;#$30=8000_0001
8、add$31,$IL$26;#$31=9000_6FFl实验7:moduleInst(clk,rst,Inst_Code,PC_new,PC);inputwireclk,rst;outputwire31:0Inst_Code;outputwire3L0PC_new;outputreg31:0PC;initialbeginPC=32h0000_0000;endROMInst_ROM(.addra(PC72)f/input5:0addra.clka(clk),/inputclka.douta(Inst_Code)/output31:0douta);assignPC_new=PC+4;always(
9、negedgeelkorposedgerst)beginif(rst)PC=32h0000_0000;elsePC=24h000000,PjneW7:0;endendmoduleInst-ROM文件:memory_initialization_radix=16;memoryjnitialization-vector=00000827,0001102b,00421820,00622020,00832820f00a33020,00463804f00a64820,01264004,00284826,01215020,01075822,00e86022,012c6820,012c7025,00c778
10、25,00a78027,00e38820,02289004,02239804z00f3a004,0034a822,0255b025,0296b820,0253c022,0272c822z0032d026,02d4d82b,0354e02b,02c2e822,0282f020,017af820;二、仿真波形实验六.*Op川小,.H-P,.二IivPC-00400080Statvs3000ffl00(K)-000000003(t)tttttttt(V)000000013(vl)00000002U(a)00000003(al)0000000SU(2)-00000007V(43)0000000EPC0
11、0000000KXooooooooRfl(t)-00007000RQ(t3)ttttttttRio(t?)rrrrerrRH(X3)00006ff2R12(14)ffff900R:3(tS)ffff200dRM(U)RlS(t7)0000000fCeuwOOOOOOOOLO000000R*ietrR16(0)fffffffRP(:00000010RlB(2)70000000R19(3802ggR20(4)OOOOOOOR2l(aS7fffffffM2(UR23(7)rffffr6ffOX09OOOCXerrfrrffOOOOOOO1Cgcooooo7ffff-M0000019008”】日小耳S
12、s.5e.s9八1:2:3:;5:6:力:9:10“ei-FFFF.FFFF“2000(LOo(MstrbtdunderEeSIiob&w.,8tflREA(Eforfullcopyrstg,c.ipiM:&r厂7foressvabUrola1offlC:Mr1b1sDsktopp.nor91.90.90;mFFFF.FFFFp,:(parmrIsyntaxrtrcIim2off)C:Mr*btIbHI*Bktopp.oedd:CtrblblC9*ktcpp.9Z:Hbl11Dktop*.1cc*&C】yloadedttttoxcutDOO-InfltxuctLOaat0x00400080三、电路图lnst:1fStfdc13PC(31:0)XSTGNDInst四、引脚配置约束文件五、思考与探索实验5:(3)设计实现一个ROM,常规存储器是单端口存储器,每次只接收一个地址,访问一个存储单元,从中读取或写入一个字节或字。主存储器是信息交换的中心,一方面CPU频繁地与主存交换信息,另一方面外设也较频繁地与主存交换信息,而单端口存储器每次只能接受一个访存者,或是读或是写